FPGA Simulation Active-HDL
Aldec Japan Co., Ltd.
About This Product
■ Product overview
ACTIVE-HDL ™ is an integrated solution for creating and simulating FPGA design and simulation for team environments running on Windows®.
-There is a complete HDL and graphical design tool and a RTL/gate -level mixed language simulator, allowing FPGA design to be available from development to verification in a short period of time.
・ The development team can maintain the same platform consistently in the FPGA design process.
・ We support all major FPGA devices such as Intel®, Lattice®, Microchip®, QuickLogic®, and XILINX®.
■ Main functions and advantages
1. Project management
・ It is possible to maintain uniformity with local or remote teams in a unified design environment of team -based.
-Setable FPGA/EDA flow manager can get more than 120 types of vendor tools and interfaces, so you can use one platform consistently during FPGA development.
2. Graphical/text design entry
・ Create design quickly using text, skematic and state machines.
・ IP is distributed and sent by secure, reliable and reliable recognition standard.
3. Simulation and debugging
・ Powerful kernel's powerful VHDL/Verilog/SystemVerilog (design)/Systemc compatible language simulator.
・ Debugging and corded high -quality tools that can be operated with GUI ensure code quality and reliability.
・ Code coverage analysis tool conducts verification based on measurement standards, and identifies the parts that are not executed.
・ Improve the quality of verification by assertion base verification (SVA, PSL) and discover more bugs.
・ A function that simulates advanced verification configurations such as SV function coverage, constrain trendum, and UVM.
・ Filled with Ga Matlab®/Simulink® interface in high -abstraction mathematical model environment for HDL simulation and DSP blocks.
4.HTML/PDF documentation
・ Express the core of the design with HDL-Skematic converter and express it with easy-to-understand graphics.
・ Designable can be automatically generated by HTML or PDF, and design can be shared immediately.
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Product
FPGA Simulation Active-HDL
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Handling Company
Aldec Japan Co., Ltd.
4 Models of FPGA Simulation Active-HDL
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| Product Image | Part Number | Price (excluding tax) |
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DM |
Available upon quote | |
De |
Available upon quote | |
PE |
Available upon quote | |
EE |
Available upon quote |
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About Company Handling This Product
- Japan
- Since 2007