All Categories

History

TSOI Wafer-TSOI Wafer Wafer diameter 100mm
TSOI Wafer-Icemos Technology Japan Co., Ltd.

About This Product

We provide dielectric isolation technology, such as separating high voltage parts and components on a single chip. Isolation consists of thick SOI and high aspect ratio deep trench etch and oxide and poly fill structures. Applicable to 100-150mm wafer size, device layer thickness 1.5-100um.

■Optional supply

・Supply of dielectric isolation substrate using isolation mask ・Providing dielectric isolation ICs that have undergone isolation process in advance using Icemos as a foundry ・Full IC design supply and manufacturing with dielectric separation from customer's circuit

■Later isolation technology can be applied

・Simple Bipolar ・CMOS (1P,2M) ・BiCMOS (1P,2M)

■Trench isolation SOI substrate has the advantage of completely separating the dielectric material into each tab.

・Eliminating the embedded layer ・Eliminating epi layer ・Eliminating P+ isolation ・Minimize parasitic capacitors ・High quality crystalline silicon layer ・Increase die yield per wafer at the same time ・High voltage resistance capability ・Customized trench pattern Our process engineers work closely with your design group to bring process development to fruition.

■Application

・MEMS devices ・Solid state relay photoelectric generator ・Photovoltaic cells and optoelectronic device ICs ・High voltage analog IC for telecommunications ・High performance bipolar circuit ・Smart power IC ・Integrated sensor

■Main features

・Complete device isolation - Significantly promotes die size reduction compared to conventional junction isolation method ・Lower defect density compared to conventional DI technology ・Substrate capacitance lower than bulk ・Cost lower than trench isolation using EPI

  • Product

    TSOI Wafer

Share this product


260+ people viewing

Last viewed: 2 hours ago


Free
Get started with our free quotation service - no cost, no obligation.

No Phone Required
We respect your privacy. You can receive quotes without sharing your phone number.

3 Models of TSOI Wafer

Click on the part number for more information about each product

Image Part Number Price (excluding tax) Buried oxide film Thermal oxide film Buried oxide film Handle layer layer thickness range Handle layer back side treatment Handle layer crystal orientation Handle layer resistivity Handle layer doping Handle layer dopant type Handle layer silicon growth method Handle thickness tolerance range Handle thickness Device layer thickness Device layer crystal orientation Device layer Final field oxide film Device layer planarization Device layer Buried layer implant Device layer low efficiency Device layer doping Device layer dopant type Device layer trench lateral diffusion doping Device layer Trench filling-oxide film (both sides) Device layer Trench filling-polysilicon Device layer trench line width Device layer trench aspect ratio Device layer trench mask tone Device layer trench mask type Device layer Silicon growth method Device Thickness Tolerance Range
TSOI Wafer-Part Number-TSOI Wafer Wafer diameter 100mm

TSOI Wafer Wafer diameter 100mm

Available upon quote

0.2-4.0μm by handle, device or both wafers

350-1,150μm

By lapping, etching or polishing

100, 111 or 110

≤0.001 - ≥10,000 Ω-cm

N type: Phos, Red Phos, Sb&As P type: Boron

N or P

CZ, MCZ or FZ

±5μm

350-800μm

≥1.5-100μm

100, 111 or 110

Thermal oxide film + TEOS up to 1μm

CMP

N type or P type

≤0.001 - ≥10,000 Ω-cm

N type: Phos, Red Phos, Sb&As P type: Boron

N or P

Phosphorus

0.1-1.0μm

To full (doped or undoped polysilicon)

>2μm

15:1

Positive resistance

E-beam master for projection aligner

CZ, MCZ or FZ

±0.5 μm

TSOI Wafer-Part Number-TSOI Wafer Wafer diameter 125mm

TSOI Wafer Wafer diameter 125mm

Available upon quote

0.2-4.0μm by handle, device or both wafers

350-1,150μm

By lapping, etching or polishing

100, 111 or 110

≤0.001 - ≥10,000 Ω-cm

N type: Phos, Red Phos, Sb&As P type: Boron

N or P

CZ, MCZ or FZ

±5μm

350-800μm

≥1.5-100μm

100, 111 or 110

Thermal oxide film + TEOS up to 1μm

CMP

N type or P type

≤0.001 - ≥10,000 Ω-cm

N type: Phos, Red Phos, Sb&As P type: Boron

N or P

Phosphorus

0.1-1.0μm

To full (doped or undoped polysilicon)

>2μm

15:1

Positive resistance

E-beam master for projection aligner

CZ, MCZ or FZ

±0.5 μm

TSOI Wafer-Part Number-TSOI Wafer Wafer diameter 150mm

TSOI Wafer Wafer diameter 150mm

Available upon quote

0.2-4.0μm by handle, device or both wafers

350-1,150μm

By lapping, etching or polishing

100, 111 or 110

≤0.001 - ≥10,000 Ω-cm

N type: Phos, Red Phos, Sb&As P type: Boron

N or P

CZ, MCZ or FZ

±5μm

350-800μm

≥1.5-100μm

100, 111 or 110

Thermal oxide film + TEOS up to 1μm

CMP

N type or P type

≤0.001 - ≥10,000 Ω-cm

N type: Phos, Red Phos, Sb&As P type: Boron

N or P

Phosphorus

0.1-1.0μm

To full (doped or undoped polysilicon)

>2μm

15:1

Positive resistance

E-beam master for projection aligner

CZ, MCZ or FZ

±0.5 μm

Click on the part number for more information about each product

Customers who viewed this product also viewed

Reviews shown here are reviews of companies.

See More Silicon Wafers Products

Other products of Icemos Technology Japan Co., Ltd.

Reviews shown here are reviews of companies.


View more products of Icemos Technology Japan Co., Ltd.

About Company Handling This Product

This is the version of our website addressed to speakers of English in the United States. If you are a resident of another country, please select the appropriate version of Metoree for your country in the drop-down menu.

Copyright © 2024 Metoree