6u Vmebus (TM) Renesas SH-4 CPU board ADVME7004
Advanet
About This Product
■ Overview
The ADVME7004 is a VME bus CPU board equipped with a 32-bit RISC-CPU SH7750 (SH-4) made by Renesas. The VME bus interface is realized with a dedicated FPGA and can be accessed directly without going through other buses. As an input/output interface, it has 1 port of 100/10BASETX Ethernet, 1 port of Motionnet, and 4 ports of serial. Serial is 3 ports for RS-232C and 1 port for RS-422.
In addition to implementing an on -board SDRAM of 128m bytes as the main memory, 512k bytes of SRAM that can be used as a battery backup. As a non -volatile memory, a 512k byte Flash memory is implemented with a socket for boot, and a 16MB's application Flash memory is implemented on board. In addition, it is equipped with a 14 -pin connector for connecting ICE.
■ Characteristics
・ Equipped with 32-bit RISC-CPU HD6417750RF240V (hereinafter SH-4) (operated at internal frequency 240MHz)
・ As the main memory, SDRAM is equipped with 128m bytes (maximum capacity can be mounted on board, SH-4)
・ Equipped with 512K bytes with SRAMs that can back up battery.
・ Equipped with 1 port of 100/10BASE-T Ethernet
・ Equipped with 1 port of Motionnet
・ Equipped with 4 ports (3 ports for RS-232C, 1 port for RS-422)
・ SH-4 can be used in Big Endian
・ Operation as VME bath master
・ Operates with 5V single power supply supplied from VME bus
・ Equipped with 14 -pin connector for ICE connection
・ TypeⅠ or TypeⅡ CompactFlash can be used
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Product
6u Vmebus (TM) Renesas SH-4 CPU board ADVME7004
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Handling Company
Advanet
1 Models of 6u Vmebus (TM) Renesas SH-4 CPU board ADVME7004
| Product Image | Part Number | Price (excluding tax) | Built -in CPU cache | Bus monitor function | CPU | CPU internal operation frequency | Current consumption current | Interapto handler function | Main memory | Memory Boot ROM | Memory CompactFlash | Memory SRAM | Memory application ROM | Outer diameter dimensions | Perferial Ethernet | Peripheral Motionnet | Peripheral Serial I/F | Power-supply voltage | ROHS Directive | VME Bus Interface Bus Master Function | VME Bus Interface Bus Standards | VME Bus Interface Urivita Function | VME bus interface board type | VME bus interface signaling level | controller |
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ADVME7004 |
Available upon quote | 16K byte for instructions, 32k bytes for data | Monitor Acfail*, Sysfail* monitoring access timeout | Renesas HD6417750RF240V (QFP256) ... SH-4 | 240MHz | 1.2a (@DC5V) |
Insited vector for any interrupt level of VME bus (Insulated status ID) can be obtained |
128m byte (32m x 32 -bit) SDRAM | Flash memory of 512K bytes (512K x 8 bits) | Type I or Type II CompactFlash can be used (modules are optional) | SRAM of 512K bytes (256k x 16 -bit) | Flash memory of 16m bytes (4m x 32 -bit) | 6U single slot width | 100/10BASE-TX specification specification 8-pin modula connector (1 port) | 8 -pin modula connector (1 port) | 8 -pin modula connector (4 ports) | DC5V ± 5% (supply from VME rack) | 2011/65/EU, (EU) 2015/863 |
Support A32, A24, A16 support for D32, D16, D08 (EO) AM code can select non -privileged access/ supervisor access |
VMebus Specification Rev.c.3 compliance | Built -in BR3 single level arbitration | Operation system controller/non -controller can be set with jumper as VME bus master | 5V TTL | Dedicated FPGA |
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