IPC1710 | IP Using IEEE1588 V2 technology IP (IP Core/FPGA/ASIC)
Fuji Soft Co., Ltd.

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Model Description

■ Overview / features The IPC1710 is optimized to provide high -quality frequency synchronization and Time of Day (TOD) on the packet transfer network using the latest IEEE1588 V2 technology. Clock synchronization is required for 3G, 4G-LTE, 5G, smart grid, industrial automation, aerospace and defense, and wireless applications. The IPC1710 is an IEEE1588 V2 slave/master that is based on the application governance, cost effect, and standard, supporting G.8261, G.8265.1, G.8275.1, and G.8275.2. The IPC1710 is designed so that field upgrades can be easily done to support future extensions and future synchronous standards. The IPC1710 is a chip on FPGA that utilizes 16MB FLASH memory and XILINX SPARTAN®-6 FPGA, which supports 64MB DDR II memory. ■ Specifications ・ IEEE1588 V2 compliant master/slave chip on fpga that works alone ・ Realizes excellent synchronous performance in the most extreme packet transport network condition ・ Configure the frequency and TOD accuracy of 3g/4G-LTE/5g slave ・ Adapt to network disorders ・ Typical lock time 10 seconds or less ・ Slave TOD error error: 10 switches managed under conditions of iTu-T G.8261 within ± 1 μSec in the network environment ・ Slave frequency accuracy performance: 16 ppb or more in 10-switched GBE network environment managed under conditions of iTu-T G.8261 ・ GMII interface ・ Providing precise holdover ・ Hybrid 1,588/Synce mode compatible (external Synce PLL required) ・ APTS (Assisted Partial Timing Support) compatible ・ IEEE1588 Profile: G.8265.1, G.8275.1, G.8275.2 ・ 64 slave/channel compatible ・ Unicast/multicast compatible ・ ONE STEP Operation/TWO STEP Operation ・ Realize low total cost ・ There are other specifications.

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• Part Number

  IPC1710

• Product

  IP Using IEEE1588 V2 technology IP (IP Core/FPGA/ASIC)

• Handling Company

  Fuji Soft Co., Ltd.

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