IPC1603 | IP Using IEEE1588 V2 technology IP (IP Core/FPGA/ASIC)
Fuji Soft Co., Ltd.

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Model Description

■ Overview / features The IPC1603 uses state -of -the -art technology for IEEE1588 V2 optimized to provide high -quality frequency synchronization and Time of Day (TOD) on the packet exchange network. Clock synchronization is required for many applications. For example, the frequency division (FDD) of UMTS (Universal Mobile Telecommunications System) requires a frequency synchronization, and LTE requires a frequency synchronization, a phase alignment, and a TOD (time of day). The IPC1603 supports FPGA, 16MB flash memory and 64MB DDR II memory using XILINX SPARTAN®-6 FPGA. The IPC1603 is an IEEE 1588 V2 slave designed to realize applications that require a high synchronization level, with a high cost, highly reliable, and reliable, and standard -based, and compliant. The IPC1603 is designed to make field -upgrades easier to support future extensions and future clock synchronization standards. ■ Specifications ・ IEEE1588 V2 compliant slave CHIP on FPGA that works alone ・ Realizes excellent synchronous performance in the most extreme packet transport network condition ・ Configure the frequency and TOD accuracy of 3g/4G-LTE/5g slave ・ Adapt to network disorders ・ Typical lock time 10 seconds or less ・ Slave TOD error error: 10 switches managed under conditions of iTu-T G.8261 within ± 1 μSec in the network environment ・ Slave frequency accuracy performance: 16 ppb or more in 10-switched GBE network environment managed under conditions of iTu-T G.8261 ・ GMII interface ・ Providing precise holdover ・ Hybrid 1,588/Synce mode compatible (external Synce PLL required) ・ APTS (Assisted Partial Timing Support) compatible ・ IEEE1588 Profile: G.8265.1, G.8275.1, G.8275.2 ・ 64 slave/channel compatible ・ Unicast/multicast compatible ・ There are other specifications.

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• Part Number

  IPC1603

• Product

  IP Using IEEE1588 V2 technology IP (IP Core/FPGA/ASIC)

• Handling Company

  Fuji Soft Co., Ltd.

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